Method for manufacturing a reverse-conducting insulated gate bipolar transistor
US8450777B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 12, 2010 |
| Grant date | May 28, 2013 |
| Priority date | — |
| Expiry date | Nov 13, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/53
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A reverse-conducting insulated gate bipolar transistor includes a wafer of first conductivity type with a second layer of a second conductivity type and a third layer of the first conductivity type. A fifth electrically insulating layer partially covers these layers. An electrically conductive fourth layer is electrically insulated from the wafer by the fifth layer. The third through the fifth layers form a first opening above the second layer. A sixth layer of the second conductivity type and a seventh layer of the first conductivity type are arranged alternately in a plane on a second side of the wafer. A ninth layer is formed by implantation of ions through the first opening using the fourth and fifth layers as a first mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.