Low noise, low power subsampling receiver
US8452252B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 28, 2010 |
| Grant date | May 28, 2013 |
| Priority date | — |
| Expiry date | Jun 23, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/18
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Techniques for a receiver includes a low noise amplifier, a Q-enhanced bandpass filter on a chip, and an analog to digital converter (ADC) at a sub-sampling speed suitable for an intermediate frequency (IF) signal. In some embodiments, a temperature compensation circuit is included. The receiver has an effective noise level less than 7 dB. In some embodiments a 1-bit ADC is used. In some of these embodiments, one or more switches in the ADC are inverted to cancel charge injection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.