System and method for recovery from memory errors in a medical device
US8452403B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 25, 2010 |
| Grant date | May 28, 2013 |
| Priority date | — |
| Expiry date | Jun 2, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/076
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system comprising an implantable medical device that comprises a memory circuit, a radiation detector circuit configured to detect a condition correlative to a high-energy radiation level that exceeds a background radiation level, and a controller circuit. The control circuit checks memory locations for errors using a first rate of error checking per time period during a normal operation mode and, in response to the radiation detector circuit indicating a high-energy radiation level, initiates a memory scrubbing mode, wherein the memory scrubbing mode has an increased rate of error checking substantially all memory locations per time period in the memory circuit to check for any errors and correct any such errors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.