Method for manufacturing a patterned retarder
US8455181B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 23, 2011 |
| Grant date | Jun 4, 2013 |
| Priority date | — |
| Expiry date | Nov 23, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/133631
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present disclosure relates to a method for manufacturing the patterned retarder used in the three-dimensional display device. The present disclosure suggests a method for manufacturing a patterned retarder comprising: defining a first retarder region and a second retarder region in the patterned retarder; forming a first polarization pattern at the first retarder region by a partial exposure process having a first exposure energy; and forming a second polarization pattern at the second retarder region by whole exposure process having a second exposure energy. By manufacturing the patterned retarder with lower exposure energy, it is possible to reduce the whole manufacturing takt time, so that the production yield can be enhanced and the production cost can be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.