Image sensor having four-transistor or five-transistor pixels with reset noise reduction
US8455934B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 25, 2008 |
| Grant date | Jun 4, 2013 |
| Priority date | — |
| Expiry date | Feb 18, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/803
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The invention relates to image sensors produced with CMOS technology, whose individual pixels, arranged in an array of rows and columns, each consist of a photodiode (PD1) associated with a charge storage region (N2) which receives the photogenerated charge before a charge readout phase. To eliminate the risk of introducing kTC-type noise into the signal, during the reset of the storage zone (N2) at the end of a readout cycle, the invention proposes that the storage zone be divided into two parts one of which (N2b), adjacent to the reset gate (G3), is covered by a diffused region (P2) of the same type of conductivity as the substrate in which the photodiode is formed, this region being brought to the fixed potential of the substrate, and the other (N2a) of which is not covered by such a region and is not adjacent to the reset gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.