Data-driven integrated circuit architecture
US8456191B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 23, 2011 |
| Grant date | Jun 4, 2013 |
| Priority date | — |
| Expiry date | Aug 23, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1428
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The exemplary embodiments provide a reconfigurable integrated circuit architecture comprising: a configurable circuit element configurable for a plurality of data operations, each data operation corresponding to a context of a plurality of contexts; a plurality of input queues; a plurality of output queues; one or more configuration and control registers to store, for each context of the plurality of contexts, a plurality of configuration bits, a run status bit, and a plurality of bits designating at least one data input queue and at least one data output queue; and an element controller coupled to the configurable circuit element and to the one or more configuration and control registers, the element controller to allow loading of a context configuration and execution of a data operation upon the arrival of input data in the context-designated data input queue when the context run status is enabled and the context-designated data output queue has a status to accept output data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.