Random access memory circuit
US8456885B2 · kind B2 · utility
2Cited by
4References
21Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Aug 4, 2009 |
| Grant date | Jun 4, 2013 |
| Priority date | — |
| Expiry date | Jul 5, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/803
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A random access memory circuit includes a plurality of pixels, each having a light sensitive area and a light blocking layer arranged over at least each of the light sensitive areas. In an alternative embodiment, the circuit includes a plurality of memory elements for storing data. Each memory element may comprise a bit node formed between a photodiode, having a light arranged over the photodiode, and a switching element, where data may be stored. The circuit may also include a plurality of reading and writing circuits for reading and writing data to and from the memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.