DMA engine capable of concurrent data manipulation
US8458377B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 5, 2010 |
| Grant date | Jun 4, 2013 |
| Priority date | — |
| Expiry date | Jan 12, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/85
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a method and device for concurrently performing a plurality of data manipulation operations on data being transferred via a Direct Memory Access (DMA) channel managed by a DMA controller/engine. A Control Data Block (CDB) that controls where the data is retrieved from, delivered to, and how the plurality of data manipulation operations are performed may be fetched by the DMA controller. A CDB processor operating within the DMA controller may read the CDB and set up the data reads, data manipulation operations, and data writes in accord with the contents of the CDB. Data may be provided from one or more sources and data/modified data may be delivered to one or more destinations. While data is being channeled through the DMA controller, the DMA controller may concurrently perform a plurality of data manipulation operations on the data, such as, but not limited to: hashing, HMAC, fill pattern, LFSR, EEDP check, EEDP generation, XOR, encryption, and decryption. The data modification engines that perform the data manipulation operations may be implemented on the DMA controller such that the use of memory during data manipulation operations uses local RAM so as to avoid a ne…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.