Synchronization system and related integrated circuit
US8458427B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Feb 7, 2011 |
| Grant date | Jun 4, 2013 |
| Priority date | — |
| Expiry date | Sep 9, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A synchronization system includes a memory and a control circuit. The control circuit includes a write interface for writing data in said memory with a first clock signal, wherein the write interface is configured for operating with a write pointer in response to a write command, a read interface for reading data from said memory with a second clock signal, wherein the read interface is configured for operating with a read pointer in response to a read command, a synchronization circuit for synchronizing said write pointer and said read pointer with a synchronization latency, and an elaboration circuit for elaborating data in memory with an elaboration latency, wherein the elaboration latency is smaller than the synchronization latency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.