Semiconductor arrangement
US8461616B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 20, 2009 |
| Grant date | Jun 11, 2013 |
| Priority date | — |
| Expiry date | Sep 18, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/857
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to at least one embodiment of the semiconductor arrangement, the latter comprises a mounting side, at least one optoelectronic semiconductor chip with mutually opposing chip top and bottom, and at least one at least partially radiation-transmissive body with a body bottom, on which the semiconductor chip is mounted such that the chip top faces the body bottom. Moreover, the semiconductor arrangement comprises at least two electrical connection points for electrical contacting of the optoelectronic semiconductor chip, wherein the connection points do not project laterally beyond the body and with their side remote from the semiconductor chip delimit the semiconductor arrangement on the mounting side thereof.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.