Reconfigurable delta-sigma modulator ADC using noise coupling
US8462033B2 · kind B2 · utility
1Cited by
3References
19Claims
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Key dates
| Filing date | Jul 22, 2011 |
| Grant date | Jun 11, 2013 |
| Priority date | — |
| Expiry date | Oct 12, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/396
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A reconfigurable analog-to-digital (ADC) modulator structure that includes a plurality of ADC structures being coupled to each other through their respective noise quantization transfer functions. Each ADC structure receives as input an analog signal and each ADC structure outputting a plurality of first output signals. An adder module receives the first output signals and performs addition on the first output signals and generates a second output signal. A division module receives the second output signal and performs division on the second output signal by a predetermined factor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.