Patent · US Active

Method and system having adjustable analog-to-digital conversion levels

US8462037B2 · kind B2 · utility

2Cited by

2References

20Claims

0Family size

Assignee

The Board of Trustees of the University of Illinois · US

Inventors

Andrew Singer · Champaign, US
Naresh Ramnath Shanbhag · Scotch Plains, US

Key dates

Filing date	Nov 15, 2010
Grant date	Jun 11, 2013
Priority date	—
Expiry date	Nov 15, 2030

Classification

Technology area (CPC H)Electricity
CPC primaryH03M1/182
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

An adaptive Analog to Digital Converter (ADC) that adjusts the representation levels used in the conversion process so as to optimize system performance. By establishing system performance criteria by which to select or adjust the signal value range associated with each digital representation and/or the digital representation, substantially fewer bits may be used in the ADC. The systems and methods described herein enable lower-power, smaller form-factor designs as well as very high-speed operation. In particular, this technology may be beneficial for use in communications systems because it enables ADC's to operate at speeds where traditional ADC designs simply cannot.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.