Differential threshold voltage non-volatile memory and related methods
US8462565B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 8, 2011 |
| Grant date | Jun 11, 2013 |
| Priority date | — |
| Expiry date | Aug 3, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49117
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments and examples of differential threshold voltage non-volatile memories and related methods are described herein. In one example, a method for providing an integrated circuit can comprise providing a memory cell coupled to a first bitline and to a second bitline, and at least one of (a) providing a read assist mechanism configured to couple to the memory cell via the first and second bitlines, or (b) providing a memory reset mechanism configured to couple to the memory cell via the first and second bitlines. Providing the memory cell can comprise providing a first transistor comprising a first threshold voltage, providing a second transistor comprising a second threshold voltage, and cross-coupling the first and second transistors of the memory cell together. A difference between the first and second threshold voltages can correspond to a logic state of the memory cell. Other embodiments, examples, and related methods are also disclosed herein.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.