Apparatus and methods for detection and correction of transmitter duty cycle distortion
US8462906B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 15, 2011 |
| Grant date | Jun 11, 2013 |
| Priority date | — |
| Expiry date | Jan 6, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/1565
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
One embodiment relates to an integrated circuit which includes a transmitter buffer circuit, a duty cycle distortion (DCD) detector, correction logic, and a duty cycle adjuster. The DCD detector is configured to selectively couple to the serial output of the transmitter buffer circuit. The correction logic is configured to generate control signals based on the output of the DCD detector. The duty cycle adjuster is configured to adjust a duty cycle of the serial input signal based on the control signals. Another embodiment relates to a method of correcting duty cycle distortion in a transmitter. Other embodiments and features are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.