System and method for preserving input impedance of a current-mode circuit
US8463206B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 11, 2011 |
| Grant date | Jun 11, 2013 |
| Priority date | — |
| Expiry date | Aug 11, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/193
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In accordance with some embodiments of the present disclosure, a circuit comprises an input node configured to receive a current-mode input signal and an input stage that includes an input device communicatively coupled to the input node. The input device is configured to receive the input signal at the input node. The circuit additionally comprises bias circuitry communicatively coupled to the input stage and configured to provide a bias current for the input device. The bias circuitry is also configured to remove at least a portion of the bias current from the input signal through a feedback loop associated with the input node such that the input signal is received by the input device with at least a portion of the bias current removed. The circuit further comprises an output stage communicatively coupled to the input stage and configured to output a current-mode output signal based on the input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.