Burst-based cache dead block prediction
US8464002B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 14, 2009 |
| Grant date | Jun 11, 2013 |
| Priority date | — |
| Expiry date | Mar 29, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0879
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure generally relates to cache memory systems and/or techniques to identify dead cache blocks in cache memory systems. Example systems may include a cache memory that is accessible by a cache client. The cache memory may include a plurality of storage locations for a first cache block, with a most recently used position location in the cache memory. A cache controller may be configured to predict whether the first cache block stored in the cache memory is identified as a dead cache block based on a cache burst of the first cache block. The cache burst may comprise a first access of the first cache block by a cache client and any subsequent contiguous accesses of the first cache block following the first access by the cache client while the first cache block is in a most recently used position of the cache set.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.