Reading a flash memory by constrained decoding
US8464131B2 · kind B2 · utility
12Cited by
6References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2009 |
| Grant date | Jun 11, 2013 |
| Priority date | — |
| Expiry date | Jun 15, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
To read memory cells that have been programmed to store an ECC codeword, with each cell storing a respective plurality of bits of the codeword, a respective value of an operational parameter such as a threshold voltage of each cell is measured. Each bit is assigned a respective metric, such as a LLR estimate of the bit, based at least in part on the respective value of the operational parameter of the bit's cell. The metrics are decoded with reference both to the ECC and to mutual constraints of the metrics within each cell that are independent of the ECC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.