Electronic device and simulation method for checking printed circuit board power loss
US8464201B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 7, 2012 |
| Grant date | Jun 11, 2013 |
| Priority date | — |
| Expiry date | Apr 7, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic device reads a layout file of a printed circuit board (PCB) to be manufactured from a storage device, obtains length information and section area information of copper cladding distributed on power source areas and ground trace areas in each of one or more layers of the PCB to be manufactured by analyzing the layout file, and calculates power loss in each of the one or more layers according to the length information, the section area information, a resistance value of the copper cladding, and preset parameters of a power supply module and an integrated circuit (IC) load to be located on the PCB. In response to a determination that the power loss in the layer exceeds a preset range, the electronic device indicates the locations of the power source areas and the ground trace areas of a layer in the PCB layout file which need to be redesigned.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.