Imaging pixels with shielded floating diffusions
US8466402B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 25, 2010 |
| Grant date | Jun 18, 2013 |
| Priority date | — |
| Expiry date | Sep 22, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/8057
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An imaging system may include imaging pixels. Each imaging pixel may include floating diffusion metal lines associated with a floating diffusion node in that imaging pixel, pixel output metal lines associated with a pixel output, and additional metal lines. The floating diffusion metal lines node may be at least partially surrounded by the pixel output metal lines. Because the floating diffusion metal lines are at least partially surrounded by the pixel output metal lines, the parasitic capacitance between the floating diffusion metal lines and the additional metal lines may be reduced. A source-follower transistor in each imaging pixel may provide a gain between the floating diffusion metal lines and the pixel output metal lines. Due to the Miller effect, the gain induced by the source-follower transistor may reduce the parasitic capacitance between the floating diffusion metal lines and the pixel output metal lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.