Programmable priority encoder
US8466711B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 19, 2011 |
| Grant date | Jun 18, 2013 |
| Priority date | — |
| Expiry date | Aug 7, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17728
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a programmable priority encoder is configured to receive inputs, including an ordered list of a plurality of input request values each representing either a request or a non-request, and a starting position within the ordered list of the plurality of input request values. The programmable priority encoder is configured to generate an identification of a result position of a first input indicating said request in order from a position identified from the starting position within the ordered list. In one embodiment, the programmable priority encoder includes a hierarchal structure of logic blocks including a plurality of columns of logic blocks; wherein a first-stage column of the plurality of columns of logic blocks is configured to operate on at most N input values; and wherein the ordered list of the plurality of input request values consists of N input request values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.