Cascade analog-to-digital converting system
US8466823B2 · kind B2 · utility
3Cited by
6References
4Claims
0Family size
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Key dates
| Filing date | Aug 5, 2011 |
| Grant date | Jun 18, 2013 |
| Priority date | — |
| Expiry date | Sep 6, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/46
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A novel analog-to-digital converter (ADC) system using a two-step conversion is disclosed. The ADC system is capable of achieving high sampling rate, low power consumption and low complexity. The new proposed ADC is formed by cascading a flash ADC having high sampling rate and low resolution with a successive approximation (SA) ADC having low power consumption and low sampling rate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.