nvSRAM with inverted recall
US8467243B1 · kind B1 · utility
6Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 23, 2010 |
| Grant date | Jun 18, 2013 |
| Priority date | — |
| Expiry date | Oct 7, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C14/0081
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A process of operating a memory circuit involves RECALLing a state of a volatile memory cell from a nonvolatile memory cell, and inverting an output of the volatile memory cell after every other RECALL.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.