Hierarchical software locking
US8468169B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 1, 2010 |
| Grant date | Jun 18, 2013 |
| Priority date | — |
| Expiry date | Feb 21, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30105
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor chip may have a built-in hardware lock and deterministic exclusive locking of the hardware lock by execution units executing in parallel on the chip. A set of software locks may be maintained, where the execution units set and release the software locks only by first acquiring a lock of the hardware lock. A first execution unit sets a software lock after acquiring a lock of the hardware lock, and other execution units, even if exclusively locking the hardware lock, are unable to lock the software lock until after the first execution unit has reacquired a lock of the hardware lock and possibly released the software lock while exclusively locking the hardware lock. An execution unit may release a software lock after and while holding a lock of the hardware lock. The hardware lock is released when a software lock has been set or released.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.