Patent · US Active

Variable-frequency bus adapter, adapting method and system

US8468286B2 · kind B2 · utility

1Cited by
11References
18Claims
0Family size

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Key dates

Filing dateJan 14, 2011
Grant dateJun 18, 2013
Priority date
Expiry dateNov 5, 2031

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F13/382
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A variable-frequency bus adapter, a variable-frequency bus adapting method and a variable-frequency bus adapting system are provided. The method includes: generating a bus blocking indication according to a dynamic frequency scaling (DFS) request signal sent by a bus side; blocking a current bus transfer according to the bus blocking indication; and feeding back a DFS response signal to the bus side after blocking the current bus transfer, where the DFS response signal is adapted to enable the bus side to perform a DFS operation. In the method, the bus transfer is temporarily blocked during the DFS, so that undesired influence on peripheral components caused by unstable bus block during the bus DFS is reduced without increasing the number of clock domains of the system or modifying the peripheral components, thus reducing the complexity of the implementation of the system, and improving the applicability of dynamic voltage frequency scaling (DVFS).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.