Clockless computer using a pulse generator that is triggered by an event other than a read or write instruction in place of a clock
US8468323B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 21, 2011 |
| Grant date | Jun 18, 2013 |
| Priority date | — |
| Expiry date | Jun 10, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8023
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer array (10) has a plurality of computers (12). The computers (12) communicate with each other asynchronously, and the computers (12) themselves operate in a generally asynchronous manner internally. When one computer (12) attempts to communicate with another it goes to sleep until the other computer (12) is ready to complete the transaction, thereby saving power and reducing heat production. The sleeping computer (12) can be awaiting data or instructions (12). In the case of instructions, the sleeping computer (12) can be waiting to store the instructions or to immediately execute the instructions. In the later case, the instructions are placed in an instruction register (30a) when they are received and executed therefrom, without first placing the instructions first into memory. The instructions can include a micro-loop (100) which is capable of performing a series of operations repeatedly. In one application, the sleeping computer (12) is awakened by an input such that it commences an action that would otherwise have required an interrupt of an otherwise active computer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.