Method and apparatus for accelerating execution of logical “and” instructions in data processing applications
US8468326B1 · kind B1 · utility
1Cited by
4References
7Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 3, 2009 |
| Grant date | Jun 18, 2013 |
| Priority date | — |
| Expiry date | Mar 13, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30018
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A hardware module configured to perform single instructions faster than is possible in software running on the microprocessor. In one implementation, the hardware module is configured to perform a single count instruction, including - counting a number of “ones” contained in a first register; and storing, in a second register, the count of the number of “ones” contained in the first register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.