Patent · US Active

Method and apparatus for elementary updating a check node during decoding of a block encoded with a non-binary LDPC code

US8468438B2 · kind B2 · utility

1Cited by
1References
20Claims
0Family size

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Key dates

Filing dateSep 13, 2010
Grant dateJun 18, 2013
Priority date
Expiry dateAug 3, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M13/6505
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

Method of elementary updating a check node of a non-binary LDPC code during a decoding of a block encoded with said LDPC code, comprising receiving a first input message (U) and a second input message (V) each comprising nm doublets having a symbol and an associated metric, delivering an output message (S) possessing nm output doublets by computing a matrix of nm2 combined doublets on the basis of a combination of the doublets of the two input messages (U,V), and reducing the number of the combined doublets so as to obtain the nm output doublets of the output message (S) possessing the nm largest or lowest metrics. The method further includes tagging redundant symbols within each input message (U, V) and fixing same at a reference value, the value of the metric of each combined doublet resulting from a combination of at least one doublet comprising a tagged redundant symbol.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.