CMOS linear voltage/current dual-mode imager
US8471189B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 18, 2007 |
| Grant date | Jun 25, 2013 |
| Priority date | — |
| Expiry date | Feb 14, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/8053
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A CMOS image sensor that is capable of both voltage- and current-mode operations selects the mode based on the position of mode switches. Each pixel on the imager has a single transistor acting as either source follower for voltage readout, or transconductor for current readout. The two modes share the same readout lines, but have their own correlated double sampling (CDS) units for noise suppression. A current-mode readout technique using a velocity-saturated short-channel transistor may be used to achieve high linearity. An image array may be formed as a mixture of 3 types of pixels with identical photodiodes and access switches. The readout transistors are optimally sized for their designated mode of operation. Alternatively, two readout transistors are provided per pixel, each individually optimized for the desired mode of operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.