Switching device failure detection system and method for multilevel converters
US8471584B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 28, 2010 |
| Grant date | Jun 25, 2013 |
| Priority date | — |
| Expiry date | Jul 30, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/42
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A multilevel converter includes a plurality of phase legs each having at least two inner switching devices, at least two outer switching devices, at least two clamping diodes, a split DC link and a switching device failure detection circuit. The switching device failure detection circuit includes a logic module for each of the switching devices, a voltage calculation module and a failure detection algorithm. The logic module generates a blocking state logic signal by comparing a switching device voltage and a threshold reference voltage and the voltage calculation module determines an expected voltage blocking state for each of the switching devices based on the gate drive signals of the switching devices and an output current direction. The failure detection algorithm detects a failure condition in any of the switching devices based on the blocking state logic signals and the expected voltage blocking states of the switching devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.