Reliable communications in on-chip networks
US8473818B2 · kind B2 · utility
17Cited by
23References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 12, 2009 |
| Grant date | Jun 25, 2013 |
| Priority date | — |
| Expiry date | Mar 27, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques for reliable communication in an on-chip network of a multi-core processor are provided. Packets are tagged with tags that define reliability requirements for the packets. The packets are routed in accordance with the reliability requirements. The reliability requirements and routing using them can ensure reliable communication in the on-chip network.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.