Printed circuit board having embedded dies and method of forming same
US8476750B2 · kind B2 · utility
0Cited by
1References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 10, 2009 |
| Grant date | Jul 2, 2013 |
| Priority date | — |
| Expiry date | Dec 24, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1517
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A package includes a printed circuit board (PCB) having a first side and a second side and a thickness between the first side and the second side and a stacked die including a top die mounted on a bottom die, the bottom die being at least partially embedded in the PCB. Also a method of forming a package that includes forming an opening in a top surface of the PCB layer, placing a stacked die including a top die stacked on a bottom die into the opening, laminating the PCB layer to form a laminate layer, and forming an electrical connection with the stacked die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.