Buffer operational amplifier with self-offset compensator and embedded segmented DAC for improved linearity LCD driver
US8476971B2 · kind B2 · utility
22Cited by
14References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 24, 2010 |
| Grant date | Jul 2, 2013 |
| Priority date | — |
| Expiry date | Feb 12, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/027
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A driver utilizes selective biasing of the terminal of an operational amplifier to reduce offset in the operational amplifier output. Each operational amplifier input includes a differential input pair of transistors including a NMOS transistor and PMOS transistor. At low and high ends of the input voltage range these transistors are selectively and individually coupled to either a standard input or biased to be on so as to contribute offset for offset compensation. The transistors are biased in a conventional manner for input voltages between the low and high ends of the voltage range.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.