Method, system, and apparatus for interpolating an output of an analog-to-digital converter
US8477056B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2010 |
| Grant date | Jul 2, 2013 |
| Priority date | — |
| Expiry date | Jun 10, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H2017/0298
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system, method, and apparatus is disclosed for interpolation of an output of an analog to digital converter (ADC) to enable operation of the ADC at a sampling rate that is independent of the sampling rate for a DSP core so as to efficiently enable operation at higher date rates. According to one of the embodiments, an interpolation circuit is coupled between the ADC and DSP core and receives a first plurality of samples of data at the first data rate from the ADC and supplies a plurality of samples of second data at a second data rate to the DSP core; the second data rate being less than the first data rate. According to one of the embodiments, the interpolation circuit includes a memory and a FIR filter circuit having filter tap coefficient values selected to provide attenuation at high frequencies to reduce aliasing noise.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.