Termination for superjunction VDMOSFET

US8482064B2 · kind B2 · utility

Assignee

• Suzhou PowerOn IC Design Co.,Ltd. · CN

Inventors

• Yangbo Yi · 安丰镇, CN
• Haisong Li · Wuxi, CN
• Qin Wang · Vancouver, CA
• Ping Tao · Jiujiang, CN
• Lixin Zhang · Shenyang, CN

Key dates

• Filing date: Jun 11, 2012
• Grant date: Jul 9, 2013
• Expiry date: Jun 11, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/127

Abstract

A termination for silicon superjunction VDMOSFET comprises heavily doped N-type silicon substrate which also works as drain region; drain metal is disposed on the back surface of the heavily doped N-type silicon substrate; an N-type silicon epitaxial layer is disposed on the heavily doped N-type silicon substrate; P-type silicon columns and N-type silicon columns are formed in the N-type silicon epitaxial layer, alternately arranged; a continuous silicon oxide layer is disposed on a part of silicon surface in the termination; structures that block the drift of mobile ions (several discontinuous silicon oxide layers arranged at intervals) are disposed on the other part of silicon surface in the termination. The structures that block the drift of mobile ions disposed in the termination region are able to effectively prevent movement of the mobile ions and improve the capability of the power device against the contamination induced by the mobile ions.