Semiconductor devices and methods for fabricating the same
US8482077B2 · kind B2 · utility
3Cited by
2References
25Claims
0Family size
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Key dates
| Filing date | May 6, 2011 |
| Grant date | Jul 9, 2013 |
| Priority date | — |
| Expiry date | May 6, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a substrate including a first region and a second region each having an n-type region and a p-type region, wherein the n-type region in the first region includes a silicon channel, the p-type region in the first region includes a silicon germanium channel, and the n-type region and the p-type region in the second region respectively include a silicon channel. A first gate insulating pattern formed of a thermal oxide layer is disposed on the substrate of the n-type and p-type regions in the second region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.