Circuit for generating a reference voltage with compensation of the offset voltage
US8482342B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 2010 |
| Grant date | Jul 9, 2013 |
| Priority date | — |
| Expiry date | Nov 7, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45466
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An embodiment of a circuit includes first and second branches, an amplifier, a compensation circuit, and a bias unit. The first and second branches are respectively operable to generate first and second currents. The amplifier has a first amplifier input node coupled to the first branch, a second amplifier input node coupled to the second branch, an amplifier output node coupled to the first and second branches, and a first compensation node. The compensation unit is operable to provide a first offset-compensation signal to the first compensation node. And the first bias unit is operable to provide first and second bias signals to the first and second input nodes, respectively, such that the amplifier is operable to cause the first current to approximately equal the second current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.