Solid-state imaging device including a plurality of pixels and a plurality of signal lines
US8482643B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 11, 2010 |
| Grant date | Jul 9, 2013 |
| Priority date | — |
| Expiry date | Oct 24, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/134
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A solid-state imaging device is capable of simplifying the pixel structure to reduce the pixel size and capable of suppressing the variation in the characteristics between the pixels when a plurality of output systems is provided. A unit cell (30) includes two pixels (31) and (32). Upper and lower photoelectric converters (33) and (34), transfer transistors (35) and (36) connected to the upper and lower photoelectric converters, respectively, a reset transistor (37), and an amplifying transistor (38) form the two pixels (31) and (32). A full-face signal line 39 is connected to the respective drains of the reset transistor (37) and the amplifying transistor (38). Controlling the full-face signal line (39), along with transfer signal lines (42) and (43) and a reset signal line (41), to read out signals realizes the simplification of the wiring in the pixel, the reduction of the pixel size, and so on.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.