Displays with minimized crosstalk
US8482686B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 7, 2013 |
| Grant date | Jul 9, 2013 |
| Priority date | — |
| Expiry date | Feb 7, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0209
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Display ground plane structures may contain slits. Image pixel electrodes in the display may be arranged in rows and columns. Image pixels in the display may be controlled using gate lines that are associated with the rows and data lines that are associated with the columns. An electric field may be produced by each image pixel electrode that extends through a liquid crystal layer to an associated portion of the ground plane. The slits in the ground plane may have a slit width. Data lines may be located sufficiently below the ground plane and sufficiently out of alignment with the slits to minimize crosstalk from parasitic electric fields. A three-column inversion scheme may be used when driving data line signals into the display, so that pairs of pixels that straddle the slits are each driven with a common polarity. Gate line scanning patterns may be used that enhance display uniformity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.