Timing analysis using formal methods
US8484009B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 14, 2010 |
| Grant date | Jul 9, 2013 |
| Priority date | — |
| Expiry date | Oct 1, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/3323
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and tools for providing precise timing analysis scalable to industrial case studies with large numbers of tasks and messages are provided, including the capability to model and analyze task and message response times; ECU usage; bus usage; end-to-end latency of task/message chains; and timing synchronization problems in task/message graphs. System tasks and messages are modeled in a formalism known as calendar automaton. Models are written in a modeling language such as Promela and instrumented with code specific to the analysis specification. Models and instrumentation are automatically generated from the system description and analysis specification. The system model is subjected to exhaustive state space exploration by a compatible model checker, such as SPIN. During exploration, the instrumented code produces results for different timing analyses. Optimization techniques are provided to generate models which require less memory and time for analysis and make the method scalable to large, industrial case studies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.