Chip lockout protection scheme for integrated circuit devices and insertion thereof
US8484481B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 21, 2010 |
| Grant date | Jul 9, 2013 |
| Priority date | — |
| Expiry date | Oct 29, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/2127
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system for implementing a chip lockout protection scheme for an IC device includes an on-chip password register that stores a password externally input by a user; an on-chip security block that generates a chip unlock signal, depending on whether the externally input password matches a correct password; an on-chip false data generator; an input protection scheme configured to gate the external data inputs to functional chip circuitry upon entry of the correct password; and an output protection scheme in communication configured to steer true chip data to external outputs of the IC device upon entry of the correct password, and to steer false data generated by the false data generator to the external outputs upon entry of an incorrect password. The false generated by the false data generator is deterministic and based upon external data inputs, thereby obfuscating whether or not the correct password has been entered.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.