Error-floor mitigation of codes using write verification
US8484535B2 · kind B2 · utility
12Cited by
50References
16Claims
0Family size
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Key dates
| Filing date | Apr 21, 2009 |
| Grant date | Jul 9, 2013 |
| Priority date | — |
| Expiry date | Apr 21, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B2220/61
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Executed when a channel input (e.g., LDPC) codeword is written to a storage medium, a write-verification method (i) compares the channel input codeword to the written codeword, (ii) identifies any erroneous bits, and (iii) stores the erroneous-bit indices to a record in a table. At some later time, the written codeword is read and sent to a decoder. If the decoder fails with a near codeword, a write-error recovery process searches the table and retrieves the erroneous-bit information. The codeword bits at those indices are adjusted, and the modified codeword is submitted to further processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.