Patent · US Active

Structure and process for electrical interconnect and thermal management

US8486765B2 · kind B2 · utility

0Cited by
6References
10Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 21, 2011
Grant dateJul 16, 2013
Priority date
Expiry dateSep 21, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/13091
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method for making a structure for thermal management of circuit devices. The method provides a first substrate and a second substrate where at least one of the first and second substrates includes a circuit element. The method forms in at least one of the first substrate and the second substrate an entrance through-hole extending through a thickness of the first substrate or the second substrate, forms in at least one of the first substrate and the second substrate an exit through-hole extending through a thickness of the first substrate or the second substrate, forms respective bonding elements on at least one of the first and second substrates, and bonds the first and second substrates at the respective bonding elements to form a seal between the first and second substrates and to form a first coolant channel in between the first and second substrates.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.