Method for forming MEMS devices having low contact resistance and devices obtained thereof

US8487386B2 · kind B2 · utility

Assignees

• IMEC · BE
• Katholieke Universiteit Leuven, KU LEUVEN R&D · BE

Inventors

• Ajay Jain · Austin, US
• Simone Severi · Leuven, BE
• Gert Claes · Leuven, BE
• John Heck · Berkeley, US

Key dates

• Filing date: Jun 17, 2010
• Grant date: Jul 16, 2013
• Expiry date: Mar 9, 2031

Classification

• Technology area (CPC B): Performing Operations; Transporting
• CPC primary: B81C2203/0735
• WIPO field: Micro-structural and nano-technology
• WIPO sector: Chemistry

Abstract

The present disclosure proposes a method for manufacturing in a MEMS device a low-resistance contact between a silicon-germanium layer and a layer contacted by this silicon-germanium layer, such as a CMOS metal layer or another silicon-germanium layer, through an opening in a dielectric layer stack separating both layers. An interlayer is formed in this opening, thereby covering at least the sidewalls of the opening on the exposed surface of the another layer at the bottom of this opening. This interlayer may comprise a TiN layer in contact with the silicon-germanium layer. This interlayer can further comprise a Ti layer in between the TiN layer and the layer to be contacted. In another embodiment this interlayer comprises a TaN layer in contact with the silicon-germanium layer. This interlayer can then further comprise a Ta layer in between the TaN layer and the layer to be contacted.