Thin-film transistor array device, el display panel, el display device, thin-film transistor array device manufacturing method, el display panel manufacturing method
US8487395B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 28, 2011 |
| Grant date | Jul 16, 2013 |
| Priority date | — |
| Expiry date | Dec 8, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/1213
Abstract
A thin-film transistor array device includes a passivation film above first and second bottom gate transistors. A gate wire is below the passivation film. A source wire and a relay wire are above the passivation film. The source wire is electrically connected to a source electrode of the first transistor via a first hole in the passivation film. A conductive oxide film is between the passivation film and both the source wire and the relay electrode and not electrically connected between the source wire and the relay electrode. The conductive oxide film covers an end portion of the gate wire that is exposed via a second hole in the passivation film. The conductive oxide film is between the relay electrode and a current-supply electrode of the second transistor and electrically connects the relay electrode and the current-supply electrode via a third hole in the passivation film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.