Time-interleaved track-and-hold circuit using distributed global sine-wave clock
US8487795B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | Apr 18, 2012 |
| Grant date | Jul 16, 2013 |
| Priority date | — |
| Expiry date | Apr 18, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/1215
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A time-interleaved track-and-hold circuit includes a clock generator adapted to receive a global sine-wave clock signal and to generate therefrom multiple square-wave output clock signals of different phases. The track-and-hold circuit includes a switching array operative in at least a track mode or a hold mode. The switching array includes multiple switch circuits, each switch circuit adapted to receive an analog input signal, a corresponding one of the output clock signals, and the global sine-wave clock signal. Each switch circuit is operative to utilize the corresponding one of the output clock signals during the track mode for tracking the analog input signal, and is operative during the hold mode to store the input signal sampled during the track mode as an output of the switch circuit and to utilize the global sine-wave clock signal during the hold mode for synchronizing sampling instants of the respective outputs of the switch circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.