Semiconductor memory device and method for controlling the same
US8488367B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 21, 2011 |
| Grant date | Jul 16, 2013 |
| Priority date | — |
| Expiry date | Aug 15, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/72
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a method for controlling a semiconductor device comprises determining a select bit number for a group of memory cells each includes a variable-resistance element, setting a first voltage corresponding to the select bit number, applying the set first voltage to the memory cell group, and performing verify read on the memory cell group to which the first voltage has been applied and determining whether or not the memory cell group passes the verify read. If the memory cell group is determined not to pass the verify read, the number of bits corresponding to passed memory cells is subtracted from the select bit number, and the first voltage corresponding to the decreased select bit number is set again.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.