Correction of distortions in an emission chain
US8488718B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 22, 2008 |
| Grant date | Jul 16, 2013 |
| Priority date | — |
| Expiry date | Apr 3, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/364
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An emission chain, comprising a processing pathway for an input signal which includes a digital signal decomposition according to N signal components, with N an integer greater than or equal to 2. The N signal components being converted from a digital form into an analog form and following distinct physical pathways that induce first respective delays on the N signal components. A delayed input signal is obtained by applying a second delay (τ) having a value greater than or equal to the maximum value of the first delays. Next, N correction delays (τ−τi) are applied respectively to the N signal components based on a comparison between said input signal delayed by the second delay and the signal to be emitted. Finally, the signal to be provided to a power amplifier is obtained by combining the N signal components obtained on completion of the previous step.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.