Processing of read requests in a memory controller using pre-fetch mechanism
US8489851B2 · kind B2 · utility
2Cited by
152References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 11, 2008 |
| Grant date | Jul 16, 2013 |
| Priority date | — |
| Expiry date | Apr 27, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/6022
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory controller provided according to an aspect of the present invention includes a predictor block which predicts future read requests after converting the memory address in a prior read request received from the processor to an address space consistent with the implementation of a memory unit. According to another aspect of the present invention, the predicted requests are granted access to a memory unit only when there are no requests pending from processors and the peripherals sending access requests to the memory unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.