Method and circuitry for detecting a fault attack
US8489897B2 · kind B2 · utility
2Cited by
3References
33Claims
0Family size
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Key dates
| Filing date | Mar 10, 2011 |
| Grant date | Jul 16, 2013 |
| Priority date | — |
| Expiry date | Aug 11, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L9/0631
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method of detecting a fault attack during a cryptographic operation using at least one look-up table including a plurality of sub-tables each having a same number of values of a fixed bit length, a fixed relation existing between values at same locations in each sub-table, the method including: performing a load operation to retrieve from the look-up table data values from a same location in each sub-table; verifying that the fixed relation exists between at least two of the data values; and generating an output signal based on the verification.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.