Solid-state mass storage device and method for failure anticipation
US8489966B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 7, 2011 |
| Grant date | Jul 16, 2013 |
| Priority date | — |
| Expiry date | Jan 20, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/52
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A solid-state mass storage device and method of operating the storage device to anticipate the failure of at least one memory device thereof before a write endurance limitation is reached. The method includes assigning at least a first memory block of the memory device as a wear indicator that is excluded from use as data storage, using pages of at least a set of memory blocks of the memory device for data storage, writing data to and erasing data from each memory block of the set in program/erase (P/E) cycles, performing wear leveling on the set of memory blocks, subjecting the wear indicator to more P/E cycles than the set of memory blocks, performing integrity checks of the wear indicator and monitoring its bit error rate, and taking corrective action if the bit error rate increases.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.